AMD XC2C256-5FT256C

Manufacturer No:

XC2C256-5FT256C

Manufacturer:

AMD

Package:

Description:

1mm PMIC 256 Pin 1.8V

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XC2C256-5FT256C information

AMD XC2C256-5FT256C technical specifications, attributes, parameters and parts with similar specifications to AMD XC2C256-5FT256C.

Type
Parameter

Surface Mount
YES

Number of Pins
256

JESD-609 Code
e0

Moisture Sensitivity Level (MSL)
3 (168 Hours)

Number of Terminations
256

Terminal Finish
Tin/Lead (Sn63Pb37)

Max Operating Temperature
70°C

Min Operating Temperature
0°C

Subcategory
Programmable Logic Devices

Technology
CMOS

Terminal Position
BOTTOM

Terminal Form
BALL

Peak Reflow Temperature (Cel)
240

Supply Voltage
1.8V

Terminal Pitch
1mm

Time@Peak Reflow Temperature-Max (s)
30

Pin Count
256

Operating Supply Voltage
1.8V

Supply Voltage-Max (Vsup)
1.9V

Temperature Grade
COMMERCIAL

Number of I/O
184

Propagation Delay
5 ns

Turn On Delay Time
5 ns

Frequency (Max)
268MHz

Programmable Logic Type
FLASH PLD

Number of Logic Blocks (LABs)
16

Speed Grade
5

Output Function
MACROCELL

Number of Macro Cells
256

JTAG BST
YES

In-System Programmable
YES

Length
17mm

Width
17mm

Radiation Hardening
No

RoHS Status
RoHS Compliant

Download datasheets and manufacturer documentation for AMD XC2C256-5FT256C.

XC2C256-5FT256C Overview

There are 256 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is programmed with 184 I/Os.There are 256 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.The terminal position of this electrical part is BOTTOM, which serves as an important access point for passengers or freight.It is powered from a supply voltage of 1.8V.This part is included in Programmable Logic Devices.It is equipped with 256 pin count.The supply voltage should be maintained at 1.8V for high efficiency.It is designed with 256 pins.The maximal supply voltage (Vsup) reaches 1.9V.The operating temperature should be higher than 0°C.The operating temperature should be lower than 70°C.Its basic building block is composed of 16 logic blocks (LABs).The maximal frequency should be lower than 268MHz.This kind of FPGA is composed of FLASH PLD.

XC2C256-5FT256C Features

184 I/Os
256 pin count
256 pins
16 logic blocks (LABs)

XC2C256-5FT256C Applications

There are a lot of Xilinx
XC2C256-5FT256C CPLDs applications.

Power up sequencing
Voltage level translation
Timing control
Interface bridging
I/O expansion
Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems

User Guide

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